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7 December, 09:07

The sequence 1011 is applied to the input of a 4-bit serial shift register that isinitially cleared. What is the state of the shift register after three clock pulses?

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  1. 7 December, 12:36
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    0110

    Explanation:

    Assuming the register shifts from left to right, and the sequence is applied LSBit first, the rightmost 3 bits of the sequence (011) will be in Q1Q2Q3 respectively, and Q4 will still be cleared.
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